hnwangkg-ezio
702def06bc
add 1.02EPD + 7.5(a,b,c) V2 + 2.7(4 gray)
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6 年 前 | |
|---|---|---|
| .. | ||
| epd7in5 | 6 年 前 | |
| LICENSE | 6 年 前 | |
| readme.md | 6 年 前 | |
readme.md
Interfaces
| Name | Description |
|---|---|
| VCC | 3.3V |
| GND | GND |
| DIN | SPI MOSI |
| CLK | SPI SCK |
| CS | SPI chip select (Low active) |
| DC | Data/Command control pin (High for data, and low for command) |
| RST | External reset pin (Low for reset) |
| BUSY | Busy state output pin (Low for busy) |